summaryrefslogtreecommitdiff
path: root/report/report.tex
diff options
context:
space:
mode:
authorBrett Weiland <brett_weiland@gmail.com>2024-04-12 14:12:56 -0500
committerBrett Weiland <brett_weiland@gmail.com>2024-04-12 14:12:56 -0500
commit302ed2955552ca681afec3d79e3a3630d0c61a09 (patch)
treef2f0348f09758108084365d45f490dbc6f0dcb00 /report/report.tex
parent07ce835c5e895bba6cbe104376484b8fc35963f5 (diff)
im dying
Diffstat (limited to 'report/report.tex')
-rw-r--r--report/report.tex15
1 files changed, 6 insertions, 9 deletions
diff --git a/report/report.tex b/report/report.tex
index 700585f..afa7680 100644
--- a/report/report.tex
+++ b/report/report.tex
@@ -13,7 +13,6 @@
\newcommand{\mathdefault}[1][]{}
-
\geometry{
a4paper,
lmargin=1in,
@@ -23,8 +22,10 @@
}
\setlength{\droptitle}{-3em} % This is your set screw
-
-
+\definecolor{codegreen}{rgb}{0,0.6,0}
+\definecolor{codegray}{rgb}{0.5,0.5,0.5}
+\definecolor{codepurple}{rgb}{0.58,0,0.82}
+\definecolor{backcolour}{rgb}{0.95,0.95,0.92}
\title{\fontfamily{phv}\selectfont
Analyzing Performance of Booth’s Algorithm and Modified Booth’s Algorithm}
@@ -72,7 +73,7 @@ Bit 2 & Bit 1 & Bit 0 & Action \\
\bottomrule
\end{tabular}
\end{table}
-Because some operations require multiplying the multiplicand by 2, an extra bit is added to the most significant side of the workspace to avoid overflow. After each iteration, the result is arithmaticlly shifted right twice. The number of iterations is only half of the length of the operands. After all iterations, the workspace is shifted right once, and the second most significant bit is set to the first most significant bit as the result register does not include the extra bit.
+Because some operations require doubling the multiplicand, an extra bit is added to the most significant side of the workspace to avoid overflow. After each iteration, the result is arithmaticlly shifted right twice. The number of iterations is only half of the length of the operands. After all iterations, the workspace is shifted right once, and the second most significant bit is set to the first most significant bit as the result register does not include the extra bit.
\par
\section*{Simulation Implimentation}
Both algorithims were simulated in Python in attempts to utalize its high level nature for rapid development. The table for Booth's algorithim was preformed with a simple if-then loop, while a switch case was used in modified booth's algorithim. Simple integers were used to represent registers.
@@ -92,11 +93,8 @@ Hardware multipliers can help accellerate applications in which multiplication i
% application should be considered
%
+\newpage
\section*{Appendix}
-\definecolor{codegreen}{rgb}{0,0.6,0}
-\definecolor{codegray}{rgb}{0.5,0.5,0.5}
-\definecolor{codepurple}{rgb}{0.58,0,0.82}
-\definecolor{backcolour}{rgb}{0.95,0.95,0.92}
\lstdefinestyle{mystyle}{
backgroundcolor=\color{backcolour},
@@ -130,4 +128,3 @@ Hardware multipliers can help accellerate applications in which multiplication i
\end{center}
\end{document}
-