major backup 8.24.21

3 files changed, 149 insertions, 1 deletions

diff --git a/src/debug/gdbinit.gdb b/src/debug/gdbinit.gdb
index 6c0cc28..c890f8d 100644
--- a/src/debug/gdbinit.gdb
+++ b/src/debug/gdbinit.gdb
@@ -1,4 +1,11 @@
 target remote localhost:1234
 symbol-file debug/debug_syms.o
-break *0x7c00
+hb smp_boot
+
+
+
+define cs2bs
+  print (1 << (5 + $arg0))
+end
 continue
+
diff --git a/src/debug/gdbinit.py b/src/debug/gdbinit.py
new file mode 100755
index 0000000..75ab5ca
--- /dev/null
+++ b/src/debug/gdbinit.py
@@ -0,0 +1,28 @@
+class NextInstructionAddress(gdb.Command):
+    """
+Run until Next Instruction address.
+
+Usage: nia
+
+Put a temporary breakpoint at the address of the next instruction, and continue.
+
+Useful to step over int interrupts.
+
+See also: http://stackoverflow.com/questions/24491516/how-to-step-over-interrupt-calls-when-debugging-a-bootloader-bios-with-gdb-and-q
+"""
+    def __init__(self):
+        super().__init__(
+            'nia',
+            gdb.COMMAND_BREAKPOINTS,
+            gdb.COMPLETE_NONE,
+            False
+        )
+    def invoke(self, arg, from_tty):
+        frame = gdb.selected_frame()
+        arch = frame.architecture()
+        pc = gdb.selected_frame().pc()
+        length = arch.disassemble(pc)[0]['length']
+        gdb.Breakpoint('*' + str(pc + length), temporary = True)
+        gdb.execute('continue')
+
+NextInstructionAddress()
diff --git a/src/debug/i8086.xml b/src/debug/i8086.xml
new file mode 100644
index 0000000..0c91287
--- /dev/null
+++ b/src/debug/i8086.xml
@@ -0,0 +1,113 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2010-2017 Free Software Foundation, Inc.
+
+     Copying and distribution of this file, with or without modification,
+     are permitted in any medium without royalty provided the copyright
+     notice and this notice are preserved.  -->
+
+<!DOCTYPE target SYSTEM "gdb-target.dtd">
+<target>
+    <architecture>i8086</architecture>
+    <feature name="org.gnu.gdb.i386.core">
+        <flags id="i386_eflags" size="4">
+            <field name="CF" start="0" end="0"/>
+            <field name="" start="1" end="1"/>
+            <field name="PF" start="2" end="2"/>
+            <field name="AF" start="4" end="4"/>
+            <field name="ZF" start="6" end="6"/>
+            <field name="SF" start="7" end="7"/>
+            <field name="TF" start="8" end="8"/>
+            <field name="IF" start="9" end="9"/>
+            <field name="DF" start="10" end="10"/>
+            <field name="OF" start="11" end="11"/>
+            <field name="NT" start="14" end="14"/>
+            <field name="RF" start="16" end="16"/>
+            <field name="VM" start="17" end="17"/>
+            <field name="AC" start="18" end="18"/>
+            <field name="VIF" start="19" end="19"/>
+            <field name="VIP" start="20" end="20"/>
+            <field name="ID" start="21" end="21"/>
+        </flags>
+
+        <reg name="eax" bitsize="32" type="int32"/>
+        <reg name="ecx" bitsize="32" type="int32"/>
+        <reg name="edx" bitsize="32" type="int32"/>
+        <reg name="ebx" bitsize="32" type="int32"/>
+        <reg name="esp" bitsize="32" type="data_ptr"/>
+        <reg name="ebp" bitsize="32" type="data_ptr"/>
+        <reg name="esi" bitsize="32" type="int32"/>
+        <reg name="edi" bitsize="32" type="int32"/>
+
+        <reg name="eip" bitsize="32" type="code_ptr"/>
+        <reg name="eflags" bitsize="32" type="i386_eflags"/>
+        <reg name="cs" bitsize="32" type="int32"/>
+        <reg name="ss" bitsize="32" type="int32"/>
+        <reg name="ds" bitsize="32" type="int32"/>
+        <reg name="es" bitsize="32" type="int32"/>
+        <reg name="fs" bitsize="32" type="int32"/>
+        <reg name="gs" bitsize="32" type="int32"/>
+
+        <reg name="st0" bitsize="80" type="i387_ext"/>
+        <reg name="st1" bitsize="80" type="i387_ext"/>
+        <reg name="st2" bitsize="80" type="i387_ext"/>
+        <reg name="st3" bitsize="80" type="i387_ext"/>
+        <reg name="st4" bitsize="80" type="i387_ext"/>
+        <reg name="st5" bitsize="80" type="i387_ext"/>
+        <reg name="st6" bitsize="80" type="i387_ext"/>
+        <reg name="st7" bitsize="80" type="i387_ext"/>
+
+        <reg name="fctrl" bitsize="32" type="int" group="float"/>
+        <reg name="fstat" bitsize="32" type="int" group="float"/>
+        <reg name="ftag" bitsize="32" type="int" group="float"/>
+        <reg name="fiseg" bitsize="32" type="int" group="float"/>
+        <reg name="fioff" bitsize="32" type="int" group="float"/>
+        <reg name="foseg" bitsize="32" type="int" group="float"/>
+        <reg name="fooff" bitsize="32" type="int" group="float"/>
+        <reg name="fop" bitsize="32" type="int" group="float"/>
+    </feature>
+    <feature name="org.gnu.gdb.i386.32bit.sse">
+        <vector id="v4f" type="ieee_single" count="4"/>
+        <vector id="v2d" type="ieee_double" count="2"/>
+        <vector id="v16i8" type="int8" count="16"/>
+        <vector id="v8i16" type="int16" count="8"/>
+        <vector id="v4i32" type="int32" count="4"/>
+        <vector id="v2i64" type="int64" count="2"/>
+        <union id="vec128">
+            <field name="v4_float" type="v4f"/>
+            <field name="v2_double" type="v2d"/>
+            <field name="v16_int8" type="v16i8"/>
+            <field name="v8_int16" type="v8i16"/>
+            <field name="v4_int32" type="v4i32"/>
+            <field name="v2_int64" type="v2i64"/>
+            <field name="uint128" type="uint128"/>
+        </union>
+        <flags id="i386_mxcsr" size="4">
+            <field name="IE" start="0" end="0"/>
+            <field name="DE" start="1" end="1"/>
+            <field name="ZE" start="2" end="2"/>
+            <field name="OE" start="3" end="3"/>
+            <field name="UE" start="4" end="4"/>
+            <field name="PE" start="5" end="5"/>
+            <field name="DAZ" start="6" end="6"/>
+            <field name="IM" start="7" end="7"/>
+            <field name="DM" start="8" end="8"/>
+            <field name="ZM" start="9" end="9"/>
+            <field name="OM" start="10" end="10"/>
+            <field name="UM" start="11" end="11"/>
+            <field name="PM" start="12" end="12"/>
+            <field name="FZ" start="15" end="15"/>
+        </flags>
+
+        <reg name="xmm0" bitsize="128" type="vec128" regnum="32"/>
+        <reg name="xmm1" bitsize="128" type="vec128"/>
+        <reg name="xmm2" bitsize="128" type="vec128"/>
+        <reg name="xmm3" bitsize="128" type="vec128"/>
+        <reg name="xmm4" bitsize="128" type="vec128"/>
+        <reg name="xmm5" bitsize="128" type="vec128"/>
+        <reg name="xmm6" bitsize="128" type="vec128"/>
+        <reg name="xmm7" bitsize="128" type="vec128"/>
+
+        <reg name="mxcsr" bitsize="32" type="i386_mxcsr" group="vector"/>
+    </feature>
+</target>
+