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authorbrett <brett@bretts-windows-laptop>2024-04-25 00:09:09 -0500
committerbrett <brett@bretts-windows-laptop>2024-04-25 00:09:09 -0500
commit4976af6a8458b8263abceb19368e95688031fb9a (patch)
tree7d41b96f3ce339135219e7302233929ea5289596 /final_project/clock.c
parent2bd45f076ea7eb429bfee54fe1de240ff4b284e6 (diff)
dooooneHEADmaster
Diffstat (limited to 'final_project/clock.c')
-rw-r--r--final_project/clock.c16
1 files changed, 9 insertions, 7 deletions
diff --git a/final_project/clock.c b/final_project/clock.c
index 7c216fc..ce4ee11 100644
--- a/final_project/clock.c
+++ b/final_project/clock.c
@@ -10,22 +10,24 @@ void timer_init_ctc() {
TCCR1A = 0x00; //WGM10 = 0, WGM11 = 0 (CTC mode when combined with WGM12 in TCCR1B)
TCCR1B = (1 << WGM12);
TCNT1 = 0; // initialize timer at 0
- //TIMSK1 |= (1<<OCIE1A); // enable int at timer1
}
void start_timer() {
TCNT1 = 0;
- OCR1A = 0x3d09; // 1 second
- if(TIFR1 & (1 << OCF1A)) TIFR1 |= (1 << OCF1A);
- TCCR1B |= (1<<CS12) | (1 << CS10); //start timer with 1024 prescalar
+ //OCRN1A = (seconds to wait / (prescaler / f_cpu))
+ OCR1A = 0x3d09; // we'll only need to delay 1 second
+ if(TIFR1 & (1 << OCF1A)) TIFR1 |= (1 << OCF1A); //discard possible compare match
+ TCCR1B |= (1<<CS12) | (1 << CS10); //start timer with 1024 prescaler
}
+//disable timer
void stop_timer() {
- if(TIFR1 & (1 << OCF1A)) TIFR1 |= (1 << OCF1A);
- TIMSK1 = (1 << WGM12);
+ if(TIFR1 & (1 << OCF1A)) TIFR1 |= (1 << OCF1A); //discard possible compare match
+ TIMSK1 = (1 << WGM12); //no clock source
}
+//see if a second pas passed since start_timer
bool timer_done() {
- return (TIFR1 & (1 << OCF1A));
+ return (TIFR1 & (1 << OCF1A)); //check if compare match
} \ No newline at end of file